Integrated circuits (chips) are very small, highly concentrated groups of electronic circuitry. Because of their small size and vulnerability to external environments, it is generally necessary to place the chips in an electronic package which allows the chips to perform their function while being protected from damage.
Dielectric ceramic bases are often used as foundations in electronic packages. The chip(s) or an intermediate substrate containing the chip(s) would be mounted on the dielectric base. Dielectric ceramic bases typically contain conductive metallization patterns. The metallization patterns may comprise thin conductor lines travelling across the interior of the dielectric base, at least roughly parallel with the chip(s).
The metallization may also include conductive vias. Vias run partially or completely through the thickness of the dielectric base, roughly perpendicular to the chip(s). Vias are generally larger in cross section than conductor lines. Vias can be used to provide contact between different levels of conductor lines in the base, etc.
Dielectric ceramic bases are typically formed by laminating a series of green ceramic layers together and firing the laminate to produce a dense ceramic. The green ceramic layers are typically formed from tapes which contain a mixture of ceramic particles and a binder. Conductor lines are formed by placing a metallization pattern on one or more of the green ceramic layers prior to firing. This is often done by screening a metal paste or ink onto the green ceramic tape.
Among other methods, vias may be formed by punching holes in the green ceramic tape and filling the holes with metal paste. The metallized green ceramic layers are then laminated in alignment so the metal-containing holes of each layer are lined up with the appropriate holes of the other layers to form the desired vias. Vias may be constructed to partially or completely traverse the thickness of the dielectric ceramic base.
In many instances, it is desirable that the electronic package be completely and reliably hermetic such that virtually all foreign materials (including gases and liquids) are prevented from contacting the chip(s). To achieve complete and reliable hermeticity, it is generally necessary to prevent leakage into the chip area along all possible paths. One possible path of leakage is along any "through-vias" or other interconnected metallization that communicates between the chip area and the external surface of the package. Through-vias are vias which traverse the entire thickness of the dielectric base providing electrical contact at both the upper and lower surfaces.
In conventional ceramic-based electronic packaging, alumina or glass ceramics were used as the dielectric ceramic materials. For those systems, hermeticity has been relatively easy to obtain because glass phases associated with those systems flow to alleviate porosity or discontinuities along through-via paths.
Recently, electronic packages based on aluminum nitride have been developed. Examples of such packages are disclosed in U.S. Pat. No. 4,920,640. The aluminum nitride system is much more refractory than the conventional ceramic systems. Additionally, the AlN system typically contains comparatively little or no glass phase which might assist in achieving hermetic through-vias. Accordingly, there is a need for via metallization capable of achieving hermeticity in aluminum nitride based electronic packages.